IJSRSET calls volunteers interested to contribute towards the scientific development in the field of Science, Engineering and Technology

Home > IJSRSET151152                                                     

Structural Implementation of Functional Unit of Core Cell Architecture for Fault Tolerant VLSI Systems


Ancy C P, Anand J Dhas, Dr. Sreeja Mole S.S
  • Abstract
  • Authors
  • Keywords
  • References
  • Details
In harsh environments like space, extra-terrestrial locations and regions of extreme conditions on the earth, the systems fielded need to be adopted to fault tolerant design. Fault tolerance has been achieved by inspiring ideas from nature. Among them Unitronics [unicellular electronics] have been attracting much attention from researchers all around due to its simplicity. The idea of Unitronics is been ignited by the numerous characteristics of Prokaryotic bacterial community. But the disadvantage of these bio-inspired approaches lies in the absence of a structural model to work with. As a first attempt, the Unitronic core architecture is designed in Microwind DSCH [Schematic Editor and Digital Simulator] software for the ease of knowing concepts behind. It helps in giving a schematic view of the architecture and generates Verilog description of the circuit which can be later used if the core architecture is to be implemented in FPGAs. The core architecture of Unitronics has been designed with the capability of Transposons [jumping genes]. An important characteristic of prokaryotes is their ability to learn from and save their environmental experience and then transfer such change of their genetic material to other cells via a process called HGT [Horizontal Gene Transfer]. This characteristics which is used in this paper helps in designing electronic systems with capabilities such as adaptability, evolvability and resistance against environmental attacks.

Ancy C P, Anand J Dhas, Dr. Sreeja Mole S.S

Fault Tolerance, Unitronics, Unicellular, Prokaryotes, Schematic representation, Horizontal Gene Transfer.


[1]. Isaak Yaang, Sung Hoon Jung and Kwang-Hyoon Cho ‘Self-repairing digital system with unified recovery process inspired by endocrine cellular communication’ IEEE transactions on VLSI Systems (June, 2013).

[2]. Daniel mange, Edurado Sanchez, A. Stauffer, G. Tempesti, P. Marchal and c. Piguet ‘Embryonics: A new methodology for designing field programmable gate arrays with self- repair and self-replicating properties ’ ( September,2008). 

[3]. Edward Stott, Pete Sedcole, Peter y K Cheung ‘Fault Tolerant Methods for reliability in FPGAs’ IEEE Xplore (November 2008).

[4]. NASA Thesaurus- ‘Aerospace science and technology dictionary F section’. 


Publication Details

Published in : Volume 1 | Issue 1 | January-Febuary - 2015
Date of Publication Print ISSN Online ISSN
2015-02-25 2395-1990 2394-4099
Page(s) Manuscript Number   Publisher
243-248 IJSRSET151152   Technoscience Academy

Cite This Article

Ancy C P, Anand J Dhas, Dr. Sreeja Mole S.S, "Structural Implementation of Functional Unit of Core Cell Architecture for Fault Tolerant VLSI Systems ", International Journal of Scientific Research in Science, Engineering and Technology(IJSRSET), Print ISSN : 2395-1990, Online ISSN : 2394-4099, Volume 1, Issue 1, pp.243-248, January-Febuary-2015.
URL : http://ijsrset.com/IJSRSET151152.php