Low-Power and Area Efficient Dual Dynamic Node Pulsed Hybrid Flip-Flop

Authors(2) :-P. Arun Kumar, C. Yamunarani

Elliptic curve point multiplication (ECPM) is one of the most critical operations in elliptic curve cryptography. In this brief, a new hardware architecture for ECPM over GF( p) is presented, based on the residue number system (RNS). The proposed architecture encompasses RNS bases with various word-lengths in order to efficiently implement RNS Montgomery multiplication. Two architectures with four and six pipeline stages are presented, targeted on area-efficient and fast RNS Montgomery multiplication designs, respectively. The fast version of the proposed ECPM architecture achieves higher speeds and the area- efficient version achieves better area–delay tradeoffs compared to state- of-the-art implementations.

Authors and Affiliations

P. Arun Kumar
Department of Electrical and Communication Engineering, SNS College of Technology, Tamilnadu, India
C. Yamunarani
Department of Electrical and Communication Engineering, SNS College of Technology, Tamilnadu, India

Elliptic curve cryptography (ECC), Montgomery multiplication, residue arithmetic, residue number system (RNS).

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Publication Details

Published in : Volume 3 | Issue 1 | January-February 2017
Date of Publication : 2017-02-28
License:  This work is licensed under a Creative Commons Attribution 4.0 International License.
Page(s) : 471-475
Manuscript Number : IJSRSET1731101
Publisher : Technoscience Academy

Print ISSN : 2395-1990, Online ISSN : 2394-4099

Cite This Article :

P. Arun Kumar, C. Yamunarani, " Low-Power and Area Efficient Dual Dynamic Node Pulsed Hybrid Flip-Flop , International Journal of Scientific Research in Science, Engineering and Technology(IJSRSET), Print ISSN : 2395-1990, Online ISSN : 2394-4099, Volume 3, Issue 1, pp.471-475, January-February-2017.
Journal URL : http://ijsrset.com/IJSRSET1731101

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