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Low-Power and Area Efficient Dual Dynamic Node Pulsed Hybrid Flip-Flop


P. Arun Kumar, C. Yamunarani
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Elliptic curve point multiplication (ECPM) is one of the most critical operations in elliptic curve cryptography. In this brief, a new hardware architecture for ECPM over GF( p) is presented, based on the residue number system (RNS). The proposed architecture encompasses RNS bases with various word-lengths in order to efficiently implement RNS Montgomery multiplication. Two architectures with four and six pipeline stages are presented, targeted on area-efficient and fast RNS Montgomery multiplication designs, respectively. The fast version of the proposed ECPM architecture achieves higher speeds and the area- efficient version achieves better area–delay tradeoffs compared to state- of-the-art implementations.

P. Arun Kumar, C. Yamunarani

Elliptic curve cryptography (ECC), Montgomery multiplication, residue arithmetic, residue number system (RNS).

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Publication Details

Published in : Volume 3 | Issue 1 | January-February - 2017
Date of Publication Print ISSN Online ISSN
2017-02-28 2395-1990 2394-4099
Page(s) Manuscript Number   Publisher
471-475 IJSRSET1731101   Technoscience Academy

Cite This Article

P. Arun Kumar, C. Yamunarani, "Low-Power and Area Efficient Dual Dynamic Node Pulsed Hybrid Flip-Flop ", International Journal of Scientific Research in Science, Engineering and Technology(IJSRSET), Print ISSN : 2395-1990, Online ISSN : 2394-4099, Volume 3, Issue 1, pp.471-475, January-February-2017.
URL : http://ijsrset.com/IJSRSET1731101.php