A Novel Approach to Optimize Area of Fused Floating Point Three Term Adder

Authors(2) :-C. Yamunarani, M. Indu

This paper presents an area efficient architecture for fused floating point addition using three terms. The first step of fused floating point addition is exponent comparison and significand alignment which occupies a major proportion of area in the overall architecture. Reduction in area is achieved by replacing exponent processing , significand alignment block and mantissa addition block of the existing fused floating point three term adder architecture with blocks having reduced area and comparable speed .The blocks proposed utilizes less hardware compared to the existing blocks without any compromise in the performance. The performance measures are evaluated using a specific tool and reduction in area is observed from the proposed work.

Authors and Affiliations

C. Yamunarani
Department of Electrical and Communication Engineering, SNS College of Technology, Tamilnadu, India
M. Indu
Department of Electrical and Communication Engineering, SNS College of Technology, Tamilnadu, India

Area Efficient , Exponent Compare, Significand Alignment, Ling Adder.

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Publication Details

Published in : Volume 3 | Issue 1 | January-February 2017
Date of Publication : 2017-02-28
License:  This work is licensed under a Creative Commons Attribution 4.0 International License.
Page(s) : 476-480
Manuscript Number : IJSRSET1731102
Publisher : Technoscience Academy

Print ISSN : 2395-1990, Online ISSN : 2394-4099

Cite This Article :

C. Yamunarani, M. Indu, " A Novel Approach to Optimize Area of Fused Floating Point Three Term Adder, International Journal of Scientific Research in Science, Engineering and Technology(IJSRSET), Print ISSN : 2395-1990, Online ISSN : 2394-4099, Volume 3, Issue 1, pp.476-480, January-February-2017.
Journal URL : http://ijsrset.com/IJSRSET1731102

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