Power Efficient Memory Design using MTCMOS Technique in 30nm Technology

Authors(2) :-P. Kaviya Priya, T. Shanmugaraja

Sense amplifiers play an important role in memories like Dynamic Random Access and Static Random Access memories. A sense amplifier compares the bit line voltage and its complement amplifies it to rail to rail output voltages. This paper mainly concentrated on the design of low power sense amplifier. An analytical model of different sense amplifier has been derived and simulated using 30nm CMOS (Complementary metal oxide semiconductor) technology with variable supply voltage using MTCMOS (Multi Threshold CMOS) technique. MTCMOS is an effective circuit level technique that improves the performance and design low power cell by utilizing both low and high threshold voltage transistors. The conventional voltage latch sense amplifier designed using MTCMOS technique to perform better in terms of power dissipation is proposed in this paper using SYNOPSYS EDA tool.

Authors and Affiliations

P. Kaviya Priya
Department of ECE, Kongu Engineering College, Erode, Tamilnadu, India
T. Shanmugaraja
Department of ECE, Kongu Engineering College, Erode, Tamilnadu, India

Memory, Sense Amplifier, Low Power, MTCMOS.

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Publication Details

Published in : Volume 3 | Issue 1 | January-February 2017
Date of Publication : 2017-02-28
License:  This work is licensed under a Creative Commons Attribution 4.0 International License.
Page(s) : 333-337
Manuscript Number : IJSRSET173182
Publisher : Technoscience Academy

Print ISSN : 2395-1990, Online ISSN : 2394-4099

Cite This Article :

P. Kaviya Priya, T. Shanmugaraja, " Power Efficient Memory Design using MTCMOS Technique in 30nm Technology, International Journal of Scientific Research in Science, Engineering and Technology(IJSRSET), Print ISSN : 2395-1990, Online ISSN : 2394-4099, Volume 3, Issue 1, pp.333-337, January-February-2017.
Journal URL : http://ijsrset.com/IJSRSET173182

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