Design and Analysis of a Random Number Generator on FPGA

Authors(3) :-D. S.Bhojane, Sneha S. Oak, Vishakha V. Bonde

Random numbers are used in a wide variety of applications. True random number generators are slow and expensive for many applications while pseudo random number generators (RNG) suffice for most applications. Although a majority of random number generators have been implemented in software level, increasing demand exists for hardware implementation due to the advent of faster and high density Field Programmable Gate Arrays (FPGA). FPGAs make it possible to implement complex systems, such as numerical calculations, genetic programs, simulation algorithms etc., at hardware level. This paper discusses in detail the hardware implementation of several RNGs and their characteristics. Random number generator is required extensively by many applications like cryptography, simulation, numerical analysis, text-to-speech etc. Most C libraries have a pair of library routines for initializing, and then generating random numbers. For parametric speech synthesis application, a random number generator is required to produce noise samples. Therefore, a need has been felt for the design of a dedicated hardware for random number generator that generates one random number per cycle so that text-to speech conversion is done in real time.

Authors and Affiliations

D. S.Bhojane
Assistant Professor, Electronics and Telecommunication Engineering, DMIETR, Wardha, Maharashtra, India
Sneha S. Oak
Assistant Professor, Electronics and Telecommunication Engineering, DMIETR, Wardha, Maharashtra, India
Vishakha V. Bonde
Lecturer, Electronics and Telecommunication Engineering, VSPD, Amravati, Maharashtra, India

Random Number Generator, Cryptography, C, synthesis, text-to-speech, FPGA

  1. Ray C. C. Cheung, John D. Villasenor, Wayne Luk, ?Hardware Generation of Arbitrary Random Number Distributions From Uniform Distribution Via the Inversion Method? vol.15, no. 8, August 2007.
  2. GU Xiao-chen, ZHANG Min-xuan ?Uniform Random Number Generator using Leap- Ahead LFSR Architecture?2009 International Conference on Computer and Communications Security.
  3. Jonathan M. Comer, Juan C. Cerda, Chris D. Martinez, and David H. K. Hoe 44th IEEE Southeastern Symposium on System Theory University of North Florida, Jacksonville, FL March 11-13, 2012.
  4. Pawel Dabal, Ryszard Pelka ?FPGA Implementation of Chaotic Pseudo-Random Bit Generators? MIXDES 2012, 19th International Conference "Mixed Design of Integrated Circuits and Systems", May 24-26, 2012, Warsaw, Poland.
  5. Carlos Arturo Gayoso, C. Gonzalez, L. Arnone, M. Rabini, Jorge Castiñeira Moreira, ?Pseudorandom Number Generator Based on the Residue Number System and its FPGA Implementation? 2013 Argentine School of Micro-Nanoelectronics, Technology and Applications.
  6. David B. Thomas, Wayne Luk, ?The LUT-SR Family of Uniform Random Number Generators for FPGA Architectures? IEEE transactions on very large scale integration (VLSI) systems, vol. 21, no. 4, April 2013
  7. Ravi Saini, Sanjay Singh, Anil K Saini, A S Mandal, Chandra Shekhar ?Design of a Fast and Efficient Hardware Implementation of a Random Number Generator in FPGA? CSIR- Central Electronics Engineering Research Institute (CSIR-CEERI) Pilani- 333031, Rajasthan, India 2013 International Conference on Advanced Electronic Systems (ICAES).
  8. Purushottam Y. Chawle and R.V. Kshirsagar Design of 8 and 16 bit LFSR with maximum length feedback polynomial using verilog HDL?.13th IRF international conference 20thjuly 2014, Pune, India.

Publication Details

Published in : Volume 4 | Issue 1 | January-February 2018
Date of Publication : 2018-02-28
License:  This work is licensed under a Creative Commons Attribution 4.0 International License.
Page(s) : 541-550
Manuscript Number : IJSRSET1841130
Publisher : Technoscience Academy

Print ISSN : 2395-1990, Online ISSN : 2394-4099

Cite This Article :

D. S.Bhojane, Sneha S. Oak, Vishakha V. Bonde, " Design and Analysis of a Random Number Generator on FPGA, International Journal of Scientific Research in Science, Engineering and Technology(IJSRSET), Print ISSN : 2395-1990, Online ISSN : 2394-4099, Volume 4, Issue 1, pp.541-550, January-February-2018.
Journal URL : http://ijsrset.com/IJSRSET1841130

Follow Us

Contact Us