Energy Saving Strategy Based on Profiling

Authors(2) :-Milan, Kanak Khanna

Constraints imposed by power consumption and the related costs are one of the key roadblocks to the design and development of next generation exascale systems. To mitigate these issues, strategies that reduce the power consumption of the processor are the need of the hour. Techniques such as Dynamic Voltage and Frequency Scaling (DVFS) exist which reduce the power consumption of a processor at runtime but they should be used in such a manner so that their overhead does not hamper application performance. In this paper, we propose an energy saving strategy which operates on timeslice basis to apply DVFS under a user defined performance constraint. Results show energy savings up to 7% when NAS benchmarks are tested on a laptop platform

Authors and Affiliations

Milan
The NorthCap University, Gurugram, Haryana, India
Kanak Khanna
The NorthCap University, Gurugram, Haryana, India

DVFS, Power Management, Frequency Scaling, Energy Saving

  1. A. Intel Power Governor. https://software.intel.com/en-us/articles/intel-power-governor.
  2. Intel Software Developer’s Manual. https://software.intel.com/en-us/articles/intel-sdm
  3. N. Almoosa, W. Song, Y. Wardi and S. Yalamanchili. A Power Capping Controller for Multicore Processors. In 2012 American Control Conference (ACC), pages 4709-4714. June 2012.
  4. D.H. Bailey et. Al. The NAS Parallel Benchmarks Summary and Preliminary Results. In Proceedings of the 1991 ACM/IEEE conference on Supercomputing, pages 158-165, 1991.
  5. S. Bhalachandra, A. Porterfield, S. L. Olivier, and J. F. Prins. An Adaptive Core-specific Runtime for Energy Efficiency. In 2017 IEEE International Parallel and Distributed Processing Symposium (IPDPS), pages 947-956, May 2017.
  6. H. David, E. Gorbatov, U.R. Hanebutte, R. Khannal, and C. Le RAPL: Memory Power Estimation and Capping. In Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design, ISLPED’10, pages 189-194, New York, NY, USA, 2010. ACM.
  7. V.W. Freeh and D.K. Lowenthal. Using Multiple Energy Gears in MPI Programs on a Powerscalable Cluster. In Proceedings of the tenth ACM SIGPLAN symposium on Principles and practice of parallel programming, pages 164-173, 2005.
  8. R. Ge, X. Feng, W. Feng, and K.W. Cameron. CPU MISER: A Performance Directed, Run-time System for Power-aware Clusters. In Parallel Processing, 2007. ICPP 2007. International Conference on, page 18, Sep. 2007.
  9. R. Ge, X. Feng, Y. He, and P. Zou. The Case for Cross-component Power Coordination on Power Bounded Systems. In 2016 45th International Conference on Parallel Processing (ICPP), pages 516-525, Aug 2016.
  10. R. Ge, X. Feng, S. Song, H.C. Chang, D. Li, and K.W. Cameron. PowerPack: Energy Profiling and Analysis of High-performance systems and Applications. Parallel and Distributed Systems, IEEE Transactions on, 21:658-671, 2010.
  11. C.H. Hsu and W. Feng. A Power-aware Runtime System for High-Performance Computing. In Supercomputing, 2005. Proceedings of the ACM/IEEE SC 2005 Conference, page 1, Nov. 2005.
  12. S. Huang and W. Feng. Energy-efficient Cluster Computing via Accurate Workload Characterization. In Cluster Computing and the Grid, 2009. CCGRID’09. 9th IEEE/ACM International Symposium on, pages 68- 75, May 2009.
  13. N. Ioannou, M. Kauschke, M. Gries, and M. Cin- tra. Phase-based Application-driven Hierarchical Power Management on the Single-chip Cloud Computer. In Parallel Architectures and Compilation Techniques (PACT), 2011 International Conference on, pages 131-142, Oct. 2011.
  14. C. Isci and M. Martonosi. Runtime Power Monitoring in High-end Processors: Methodology and empirical data. In Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture, MICRO 36, pages 93-, Washington, DC, USA, 2003. IEEE Computer Society.
  15. K. Kandalla, E.P. Mancini, S. Sur, and D.K. Panda. Designing Power-aware Collective Communication Algorithms for InfiniBand Clusters. In Parallel Processing (ICPP), 2010 39th International Conference on, pages 218-227, 2010.
  16. Kristopher Keipert, Gaurav Mitra, Vaibhav Sundriyal, Sarom S. Leang, Masha Sosonkina, Alistair P. Rendell, and Mark S. Gordon. Energy Efficient Computational Chemistry: Comparison of x86 and ARM Systems. Journal of Chemical Theory and Computation, 11(11):5055-5061, 2015. PMID: 26574303.
  17. Gary Lawson, Vaibhav Sundriyal, Masha Sosonkina, and Yuzhong Shen. Runtime Power Limiting of Parallel applications on Intel Xeon Phi Processors. In Proceedings of the 4th International Workshop on Energy Efficient Supercomputing, E2SC ’16, pages 39- 45, Piscataway, NJ, USA, 2016. IEEE Press.
  18. M.Y. Lim, V.W. Freeh, and D.K. Lowenthal. Adaptive, Transparent Frequency and Voltage scaling of Communication Phases in MPI Programs. In Proceedings of the 2006 ACM/IEEE conference on Supercomputing, 2006.
  19. K. Ma, X. Li, W. Chen, C. Zhang, and X. Wang. GreenGPU: A Holistic Approach to Energy Efficiency in GPU-CPU Heterogeneous Architectures. In 2012 41st International Conference on Parallel Processing, pages 48-57, Sept 2012.
  20. B. Rountree, D.K. Lowenthal, B.R. de Supinski, M. Schulz, V.W. Freeh, and T. Bletsch. Adagio: Making DVS Practical for Complex HPC Applications. In Proceedings of the 23rd international conference on Supercomputing, ICS’09, pages 460-469, New York, NY, USA, 2009. ACM.
  21. Jayanth Srinivasan. An Overview of Static Power Dissipation. Technical report.
  22. V. Sundriyal and M. Sosonkina. Per-call Energy Saving Strategies in All-to-all Communications In Proceedings of the 18th European MPI Users’ Group conference on Recent advances in the message passing interface, EuroMPI’11, pages 188-197, Berlin, Heidelberg, 2011. SpringerVerlag.
  23. V. Sundriyal and M. Sosonkina. Initial Investigation of a Scheme to use Instantaneous CPU Power Consumption for Energy Savings format. In Proceedings of the 1st International Workshop on Energy Efficient Supercomputing, E2SC ’13, pages 1:1-1:6, New York, NY, USA, 2013. ACM.
  24. V. Sundriyal and M. Sosonkina. Joint Frequency Scaling of Processor and DRAM. The Journal of Supercomputing, 72(4):1549-1569, 2016.
  25. V. Sundriyal, M. Sosonkina, and A. Gaenko. Runtime Procedure for Energy Savings in Applications with Point-to-point Communications. In Computer Architecture and High-Performance Computing (SBAC-PAD), 2012 IEEE 24th International Symposium on, pages 155-162, 2012.
  26. V. Sundriyal, M. Sosonkina, and Z. Zhang. Achieving Energy Efficiency During Collective Communications. Concurrency and Computation: Practice and Experience, 25(15):2140-2156, 2013.
  27. V. Sundriyal, M. Sosonkina, and Z. Zhang. Automatic Runtime Frequency Scaling System for Energy Savings in Parallel Applications. The Journal of Supercomputing, 68(2):777-797, 2014.
  28. Vaibhav Sundriyal, Ellie Fought, Masha Sosonkina, and Theresa L. Windus. Power Profiling and Evaluating the Effect of Frequency Scaling on NWChem. In Proceedings of the 24th High Performance Computing Symposium, HPC ’16, pages 19:1-19:8, San Diego, CA, USA, 2016. Society for Computer Simulation International.
  29. Vaibhav Sundriyal, Ellie Fought, Masha Sosonkina, and Theresa L. Windus. Evaluating effects of application based and automatic energy saving strategies on NWChem. In Proceedings of the 25th High Performance Computing Symposium, HPC ’17, pages 16:1-16:12, San Diego, CA, USA, 2017. Society for Computer Simulation International.
  30. Vaibhav Sundriyal and Masha Sosonkina. Runtime power-aware energy-saving scheme for parallel applications. 2015.
  31. Vaibhav Sundriyal, Masha Sosonkina, Alexander Gaenko, and Zhao Zhang. Energy saving strategies for parallel applications with point-to-point communication phases. Journal of Parallel and Distributed Computing, 73(8):1157 - 1169, 2013.
  32. A. Vishnu, S. Song, A. Marquez, K. Barker, D. Kerbyson, K. Cameron, and P. Balaji. Designing Energy Efficient Communication Runtime Systems for Data Centric Programming Models. In Proceedings of the 2010 IEEE/ACM Int’l Conference on Green Computing and Communications & Int’l Conference on Cyber, Physical and Social Computing, GREENCOM- CPSCOM ’10, pages 229-236, Washington, DC, USA, 2010. IEEE Computer Society.
  33. C. Lefurgy, K. Rajamani, F. Rawson, W. Felter, M. Kistler, and T.W. Keller. Energy management for commercial servers. Computer, 36(12):39- 48, December 2003.
  34. S. Borkar. The exascale challenge, 2011. Keynote speech, the 12th International Conference on Parallel Architectures and Compilation Techniques.
  35. R. Gonzalez, B. M. Gordon, and M. A. Horowitz. Supply and Threshold Voltage Scaling for Low Power CMOS. IEEE Journal of Solid-State Circuits, 32(8):1210-1216, Aug 1997.
  36. G. Semeraro, G. Magklis, R. Balasubramonian, D. H. Albonesi, S. Dwarkadas, and M. L. Scott. Energy-Efficient Processor Design Using Multiple Clock Domains with Dynamic Voltage and Frequency Scaling. In Proceedings Eighth International Symposium on High Performance Computer Architecture, pages 29-40, Feb 2002.
  37. Linux Kernel Governors. https://www.kernel.org/doc/Documentation/cpufreq/governors.txt. Online].
  38. V Pallipadi and A Starikovskiy. The Ondemand Governor: Past, Present and Future. 2:223-238, 01 2006
  39. R. Efraim, R. Ginosar, C. Weiser, and A. Mendelson. Energy Aware Race to Halt: A Down to Earth Approach for Platform Energy Management. IEEE Computer Architecture Letters, 13(1):25-28, Jan 2014.
  40. J. P. Halimi, B. Pradelle, A. Guermouche, N. Triquenaux, A. Laurent, J. C. Beyler, and W. Jalby. Reactive DVFS Control for Multicore Processors. In 2013 IEEE International Conference on Green Computing and Communications and IEEE Internet of Things and IEEE Cyber, Physical and Social Computing, pages 102-109, Aug 2013.
  41. Vaibhav Sundriyal, Masha Sosonkina, Fang Liu, and Michael W. Schmidt. Dynamic Frequency Scaling and Energy Saving in Quantum Chemistry Applications. In IEEE International Symposium on Parallel and Distributed Processing Workshops and PhD Forum, pages 837-845, 2011.
  42. J. Park et. al. Accurate Modeling and Calculation of Delay and Energy Overheads of Dynamic Voltage Scaling in Modern High-Performance Microprocessors. ISPLED 2010. Pages 419-424.
  43. A. Marathe et. al. A Run-time System for Power Constrained HPC Applications. International Conference on High Performance Computing. ISC 2015.
  44. R. Ge et. al. The Case for Cross-Component Power Coordination on Power Bounded Systems. International Conference on Parallel Processing. 2016.
  45. A. Tiwari et. al. Predicting Optimal Power Allocation for CPU and DRAM Domains. IEEE International Parallel and Distributed Processing Symposium. 2015.

Publication Details

Published in : Volume 4 | Issue 1 | January-February 2018
Date of Publication : 2018-02-28
License:  This work is licensed under a Creative Commons Attribution 4.0 International License.
Page(s) : 1040-1046
Manuscript Number : IJSRSET1841171
Publisher : Technoscience Academy

Print ISSN : 2395-1990, Online ISSN : 2394-4099

Cite This Article :

Milan, Kanak Khanna, " Energy Saving Strategy Based on Profiling, International Journal of Scientific Research in Science, Engineering and Technology(IJSRSET), Print ISSN : 2395-1990, Online ISSN : 2394-4099, Volume 4, Issue 1, pp.1040-1046, January-February-2018. Citation Detection and Elimination     |     
Journal URL : https://ijsrset.com/IJSRSET1841171

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