Implementation of Reversible Circuits in Modular Adders

Authors

  • A. K. Shaneel Kumar Reddy  ECE Department, Panimalar Institute of Technology, Chennai, Tamil Nadu, India
  • M. Guru Sai  ECE Department, Panimalar Institute of Technology, Chennai, Tamil Nadu, India
  • T. Bharath Reddy  ECE Department, Panimalar Institute of Technology, Chennai, Tamil Nadu, India
  • D. Arul Kumar  Assistant Professor, ECE Department, Panimalar Institute of Technology, Chennai, Tamil Nadu, India

DOI:

https://doi.org//10.32628/IJSRSET196238

Keywords:

Residue Number System, Reversible Circuits, Modular Adder, Parallel-Prefix Adder

Abstract

Reversible logic is a computing paradigm that has attracted significant attention in recent years due to its properties that lead to ultra-low power and reliable circuits. Reversible circuits are fundamental, for example, for quantum computing .Since addition is a fundamental operation, designing efficient adders is a cornerstone in the research of reversible circuits. Residue Number Systems (RNS) has been as a powerful tool toprovide parallel and fault-tolerant implementations of computations where additions and multiplications are dominant. In this paper, for the first time in the literature, we propose the combination of RNS and reversible logic. The parallelism of RNS is leveraged to increase the performance of reversible computational circuits. Being the most fundamental part in any RNS, in this work we propose the implementation of different adders, namely ripple carry adder, carry save adder, carry look ahead adder using reversible logic. Analysis and comparison with different adders for modular addition are designed using reversible gates with minimum overhead in comparison to regular Brunt Kung modulo-adders.

References

  1. T. M. Conte, E.P. DeBenedictis, P.A. Gargini, and E. Track, “RebootingComputing: The Road Ahead,” Computer, vol. 50, no. 1, pp. 20-29, 2017.
  2. M. Alioto (Ed.), Enabling the Internet of Things: From IntegratedCircuits to Integrated Systems, Springer , 2017.
  3. A.S.Molahosseini, L.Sousa and C.H. Chang (Eds.), Embedded Systems Design with Special Arithmetic and Number Systems,Springer, 2017.
  4. C. H. Chang, A. S. Molahosseini, A. A. EmraniZarandi, and T. F. Tay, “Residue Number Systems : A New Paradigm to Datapath Optimizationfor Low-Power and High-Performance Digital Signal Processing Applications,” IEEE Circuits and Systems Magazine, vol. 15, no. 4, pp. 26-44, 2015.
  5. L. Sousa, S. Antão, and P. Martins, “Combining Residue Arithmetic toDesign Efficient Cryptographic Circuits and Systems,” IEEE Circuits andSystems Magazine, vol. 16, no. 4, pp. 6-32, 2016.

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Published

2019-04-30

Issue

Section

Research Articles

How to Cite

[1]
A. K. Shaneel Kumar Reddy, M. Guru Sai, T. Bharath Reddy, D. Arul Kumar, " Implementation of Reversible Circuits in Modular Adders, International Journal of Scientific Research in Science, Engineering and Technology(IJSRSET), Print ISSN : 2395-1990, Online ISSN : 2394-4099, Volume 6, Issue 2, pp.135-141, March-April-2019. Available at doi : https://doi.org/10.32628/IJSRSET196238