An Optimized Three-Phase Multilevel Inverter Topology with Separate Level and Phase Sequence Generation Part

Authors

  • G. S. N. M. Venkatesh  Assistant Professor EEE Department, Raghu Institute of Technology, Visakhapatnam, India
  • G. Joga Rao  Associate Professor EEE Department, Raghu Institute of Technology, Visakhapatnam, India
  • M. V. Guna Vardhan  B.Tech Scholar EEE Department, Raghu Institute of Technology, Visakhapatnam, India
  • K. Kalyani  B.Tech Scholar EEE Department, Raghu Institute of Technology, Visakhapatnam, India
  • K. Pavan Sai  B.Tech Scholar EEE Department, Raghu Institute of Technology, Visakhapatnam, India
  • K. G. M. Pavan  B.Tech Scholar EEE Department, Raghu Institute of Technology, Visakhapatnam, India
  • Ch. Pavan  B.Tech Scholar EEE Department, Raghu Institute of Technology, Visakhapatnam, India

Keywords:

Common Mode Voltage, Multilevel Inverter, Topology, Flying Capacitor.

Abstract

This paper presents an optimized, 3-φ, multilevel inverter (MLI) topology. The proposed system is derived by cascading the level generation part with the phase sequence generation part. Further, it can be operated at any required level depending upon the configuration of the level generation part. Thus, for higher level operation extra components are required at the level generation part only. Therefore, number of components required for the proposed MLI is lower than the conventional 3-φ MLI topologies for higher level operation. Further, the level generation part is shared by the three phases equally. This eliminates the possibility of phase unbalance. The working principle and the operation of the proposed MLI are supported with the simulation and experimental validations. Further, the proposed optimized MLI is also compared with the conventional 3-φ MLIs to prove its advantage.

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International Journal of Scientific Research in Science, Engineering and Technology

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Published

2020-04-30

Issue

Volume 7, Issue 2, March-April-2020

Section

Research Articles

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How to Cite

[1]
G. S. N. M. Venkatesh, G. Joga Rao, M. V. Guna Vardhan, K. Kalyani, K. Pavan Sai, K. G. M. Pavan, Ch. Pavan, " An Optimized Three-Phase Multilevel Inverter Topology with Separate Level and Phase Sequence Generation Part, International Journal of Scientific Research in Science, Engineering and Technology(IJSRSET), Print ISSN : 2395-1990, Online ISSN : 2394-4099, Volume 7, Issue 2, pp.92-97, March-April-2020.