1.
K. Pasipalana Rao, Ch. Hari Chandrika, G. Ramya Krishna, G. Anitha Iswarya. A Power-Efficient FPGA Test Pattern Composer. Int J Sci Res Sci Eng Technol. 2024;11(2):333-341. Accessed May 19, 2024. http://ijsrset.com/index.php/home/article/view/IJSRSET2411250