[1]
C. Manoj Kumar, T. Navya, K. Swathi, T. Sunitha, and B. Thabitha, “Simulation and Analysis of Inverting and Non-Inverting Mixed Logic 2 To 4 Decoder Using 32 Nanometer Fin-FET Technology”, Int J Sci Res Sci Eng Technol, vol. 12, no. 2, pp. 637–645, Apr. 2025, doi: 10.32628/IJSRSET25122188.