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Brief Introduction about VHDL Implementation of CVSD Codec


Neha Sharma, Amrita Soni, Piyush Gupta
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In order for the signal to have good quality, the slope-overload error desires to be as small as possible. Adaptive delta modulation reduces the slope over load error to a greater extent. One of the algorithms of ADM is CVSD algorithm. CVSD (continuous variable slope delta) modulation is an effective scheme for audio signal. CVSD is best coding technique for improving receiver sensitivity with low transmission rate as compare to PCM. Here in this paper, we discuss the implementation of CVSD codec system using VHDL (Very High Speed Integrated Circuit Hardware Description Language). VHDL provides structure to be modelled and simulated before synthesis tools (XST tools). It allows the description of a concurrent system. It is portable and multipurpose. These paper is also describes the various RTL schematic of each module of the CVSD codec and the connections of all RTL blocks in Top level design.

Neha Sharma, Amrita Soni, Piyush Gupta

Transfer Level (RTL), DM, ADM, VHDL, Verilog, PIPO, SIPO.

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Publication Details

Published in : Volume 3 | Issue 6 | September-October - 2017
Date of Publication Print ISSN Online ISSN
2017-10-31 2395-1990 2394-4099
Page(s) Manuscript Number   Publisher
92-96 IJSRSET173630   Technoscience Academy

Cite This Article

Neha Sharma, Amrita Soni, Piyush Gupta, "Brief Introduction about VHDL Implementation of CVSD Codec", International Journal of Scientific Research in Science, Engineering and Technology(IJSRSET), Print ISSN : 2395-1990, Online ISSN : 2394-4099, Volume 3, Issue 6, pp.92-96, September-October-2017.
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