Integrated-Circuit Random Access Memory based on an Emerging Technology - Electron Tunneling Through Tunnel Junction

Abstract

Depending upon the Principle of linear threshold logic, we will be able to construct more complex circuits with low power, electronic speed, and high concentration density. In this work, a more complex circuit called Integrated-Circuit Random Access Memory has been developed. To develop this Random Access Memory we will have to implement some small components like 3-input AND gate, a 4-input OR gate, inverter, RS Flip-flop, 2×4 decoder. After verifying their theoretical characteristics with the simulated result done by the simulator, we have constructed the desired IC RAM using them. All the small elements we have provided in due places are analyzed, found out their threshold logic equations, drawn their threshold logic gates, listed their truth tables, given the corresponding circuits with exact values of parameters and above all drawn their input-output simulated graphs. Based on 3-input AND gate and Inverter, a memory cell (MC) is implemented. Arranging the memory cells in a regular pattern with the assistance of the decoder, a random access memory (RAM) of 4 words having 3-bits each is built. Whether the circuits drawn is faster or not are checked with the same type of CMOS circuits and Single electron transistor (SET) based circuits. We have observed that our threshold logic based circuits are mere faster than the other two types. The power required for execution or for performing the tunneling event is measured and seen that it is in the range of up to 900meV which is really very low. All the circuit presented in this work are made up of generic multiple input threshold logic gate(s) which is also described.