Design and Implementation of Reliable Voltage Level Shifter Using Different Current Mirroring Phenomena
Keywords:
Tanner EDA tool, Voltage level shifter, Cascode current mirror, Wilson current mirror, Robust Design, Voltage conversion, Topological Current MirrorsAbstract
The project focuses on creating a reliable voltage level shifter through the implementation of various current mirror topologies in VLSI technology. Current mirrors, known for their precision in copying currents between transistors, offer versatile circuit configurations for biasing, current scaling, and power management. By leveraging the unique properties of different current mirrors, the suggested solution aims to enhance voltage shifting processes, reduce power dissipation, and improve circuit stability. Power has been decreased than the existed method. It has approximately obtained as 41.75µW for Cascode and 18.38µW for Wilson Current Mirrors. The real-world application of this design seeks to elevate the robustness and reliability of voltage shifting in electronic circuits. This design and implementation are performed in mentor graphics (EDA tool).
Downloads
References
Chen, C., Labrousse, D., Lefebvre, S., Petit, M., Buttay, C., & Morel, H. (2015). Study of short-circuit robustness of SiC MOSFETs, analysis of the failure modes and comparison with BJTs. Microelectronics Reliability, 55(9- 10), 1708-1713.
Luo, S. C., Huang, C. J., & Chu, Y. H. (2014). A wide-range level shifter using a modified Wilson current mirror hybrid buffer. IEEE Transactions on Circuits and Systems I: Regular Papers, 61(6), 1656-1665.
Kabirpour, S., & Jalali, M. (2018). A low-power and high-speed voltage level shifter based on a regulated cross-coupled pull-up network. IEEE Transactions on Circuits and Systems II: Express Briefs, 66(6), 909-913..
Fassio, L., Settino, F., Lin, L., De Rose, R., Lanuzza, M., Crupi, F., & Alioto, M. (2020). A robust, high-speed and energy-efficient ultralow-voltage level shifter. IEEE Transactions on Circuits and Systems II: Express Briefs, 68(4), 1393-1397.
Jaisinghani, D., Aarthi, U. S., & Pande, K. S. (2022, October). A cascode current mirror based 90 mv to 1.8 v level shifter with alleviated delay. In 2022 International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER) (pp. 45-50). IEEE.
Ramirez-Angulo, J., Carvajal, R. G., & Torralba, A. (2004). Low supply voltage high- performance CMOS current mirror with low input and output voltage requirements. IEEE Transactions on Circuits and Systems II: Express Briefs, 51(3), 124-129.
You, H., Yuan, J., Tang, W., Qiao, S., & Hei, Y. (2020). An energy-efficient level shifter for ultra low-voltage digital LSIs. IEEE Transactions on Circuits and Systems II: Express Briefs, 67(12), 3357-3361.
Minch, B. A. (2007, May). Low- voltage Wilson current mirrors in CMOS. In 2007 IEEE International Symposium on Circuits and Systems (pp. 2220-2223). IEEE.
Aggarwal, B., Arora, Y., & Dhona, J. K. (2021). Bandgap current reference using widlar current source. Indian Journal of Engineering and Materials Sciences (IJEMS), 27(4), 934-938.
Lütkemeier, S., & Rückert, U. (2010). A subthreshold to above-threshold level shifter comprising a Wilson current mirror. IEEE
Transactions on Circuits and Systems II: Express Briefs, 57(9), 721-724.
Kim, T. T. H. (2018). An area and energy efficient ultra-low voltage level shifter with pass transistor and reduced-swing output buffer in 65-nm CMOS. IEEE Transactions on Circuits and Systems II: Express Briefs, 65(5), 607-611.
Aggarwal, B., Gupta, M., Gupta, A. K., & Bansal, S. (2014). A very high-performance compact CMOS current mirror. Analog Integrated Circuits and Signal Processing, 81, 367-375.
Razavi, B. (2005). Design of analog CMOS integrated circuits. Tsinghua University Press Co., Ltd
Downloads
Published
Issue
Section
License
Copyright (c) 2024 International Journal of Scientific Research in Science, Engineering and Technology
This work is licensed under a Creative Commons Attribution 4.0 International License.