K. Pasipalana Rao, Ch. Hari Chandrika, G. Ramya Krishna, and G. Anitha Iswarya, “A Power-Efficient FPGA Test Pattern Composer”, Int J Sci Res Sci Eng Technol, vol. 11, no. 2, pp. 333–341, Apr. 2024, Accessed: May 18, 2024. [Online]. Available: https://ijsrset.com/index.php/home/article/view/IJSRSET2411250