K. Pasipalana Rao, Ch. Hari Chandrika, G. Ramya Krishna, and G. Anitha Iswarya. “A Power-Efficient FPGA Test Pattern Composer”. International Journal of Scientific Research in Science, Engineering and Technology 11, no. 2 (April 19, 2024): 333–341. Accessed May 18, 2024. https://ijsrset.com/index.php/home/article/view/IJSRSET2411250.